Quote from Jeff Nading on May 16th, 2012, 05:28 AM

Looks like you almost have it webmug.:cool::D

Hi Jeff,

Far from it, this is only just the beginning. :cool: :D

Br,
Webmug

Quote from Webmug on May 16th, 2012, 05:36 AM

Quote from Jeff Nading on May 16th, 2012, 05:28 AM

Looks like you almost have it webmug.:cool::D

Hi Jeff,

Far from it, this is only just the beginning. :cool: :D

Br,
Webmug

Just words of encouragement, not talking about the whole picture, just the small section you are working in, so, it's a good job you guy's are doing. There are allot of people following your lead that aren't posting, thanks for helping us along the way, Jeff.:D

Im sure half of you got this e-mail from Jameco but I figured Id post it any way. "Design an electronics project, we’ll kit it and pay you a royalty every time it sells!" Maybe someone could make a VIC kit so that newcomers and stuff can more easily get started! Heres the link: http://links.enews.jameco.com/servlet/MailView?ms=NDA3ODgxMgS2&r=MTk3NzMxMjY0ODkS1&j=MTI1MTM2MDU3S0&mt=1&rt=0

Quote from MrBluesky on May 16th, 2012, 07:31 AM

Im sure half of you got this e-mail from Jameco but I figured Id post it any way. "Design an electronics project, we’ll kit it and pay you a royalty every time it sells!" Maybe someone could make a VIC kit so that newcomers and stuff can more easily get started! Heres the link: http://links.enews.jameco.com/servlet/MailView?ms=NDA3ODgxMgS2&r=MTk3NzMxMjY0ODkS1&j=MTI1MTM2MDU3S0&mt=1&rt=0

i think your correct!
but i also must say that this in not in the stages of a "kit". at this moment i think this is still in heavy development. but once we get a clearer grip on this it will be a much needed thing!

as for now...

Sharky, do you still have a parts list and a link to the parts on mouser?

could you post it in the first post?

MrBluesky,

that will be a good start?

thanks! good to see others post there thoughts on making this easier for us all! :)

~Russ

Quote from Webmug on May 16th, 2012, 02:23 AM

Hi Faisca,

pll pin14. pulse 16.6kHz from my waveform generator as refIn I could lock-in with the circuit from Sharky. If the pulse was below or higher than the vco settings (R1,R2 C1-2) then the scanner is on free-run, no lock. (PLL VCO voltage min. to max. to min from the scanner)

https://www.youtube.com/watch?v=0VCLCG_6I18
You can see when I change the RefIn pll pin14. input signal in frequency the pll locks-in.
Blue is pll pin3. signal Yellow is pll pin4 Fout.
Second part is the yellow signal at the TIP120 SIG_PRI.

First I wanted to build the "cell driver circuit" from Stan but I can not make it work.
Perhaps you are able to make it work. For now I use the BC556 driver for the TIP120.

https://www.youtube.com/watch?v=s5KQn8oVDpo

Here you can see the Gating active, the pll tries to lock but it fails to keep it locked in the gate time and tries to lock-in again after inhibit is disabled. Yellow is the feedback signal from the opamp. Don''t mind the pulse shape it is not perfect! Should be 50% block pulse I guess.

All this I build on a breadboard. This is what I have so far...

Br,
Webmug

Thanks, Webmug.
Your test is correct (I also did), but not how it proceeds in Meyer PLL to lock in the best wave.
I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.[/quote]I'm re-sending the diagrams of the two versions. Now, very well.

Quote from Faisca on May 18th, 2012, 02:29 PM

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm re-sending the diagrams of the two versions. Now, very well.

Don't know for sure, but I think the scanning is needed when the gate is active.

Russ, Sharky, do you got time to test the pcb and post some info?:D

Br,
Webmug

Quote from Webmug on May 19th, 2012, 01:20 AM

Quote from Faisca on May 18th, 2012, 02:29 PM

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm re-sending the diagrams of the two versions. Now, very well.

Don't know for sure, but I think the scanning is needed when the gate is active.

Russ, Sharky, do you got time to test the pcb and post some info?:D

Br,
Webmug

cores will be in next week... then i can do some real tests.

at the moment, when i turn on gating it kinda skips around. it seems to act odd.

but it dose lock on at a very low frequency. this is with an iron core. so the ferrite will be a huge help...

do you need me to still test the output of tony's circuit like you asked before? and if so. what did you need me to test?

tanks! ~Russ

PS. keep up the good work and ideas guys! its grate to see everyone getting along! ;0

Quote from ~Russ/Rwg42985 on May 19th, 2012, 03:03 AM

Quote from Webmug on May 19th, 2012, 01:20 AM

Quote from Faisca on May 18th, 2012, 02:29 PM

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm re-sending the diagrams of the two versions. Now, very well.

Don't know for sure, but I think the scanning is needed when the gate is active.

Russ, Sharky, do you got time to test the pcb and post some info?:D

Br,
Webmug

cores will be in next week... then i can do some real tests.

at the moment, when i turn on gating it kinda skips around. it seems to act odd.

but it dose lock on at a very low frequency. this is with an iron core. so the ferrite will be a huge help...

do you need me to still test the output of tony's circuit like you asked before? and if so. what did you need me to test?

tanks! ~Russ

PS. keep up the good work and ideas guys! its grate to see everyone getting along! ;0

Yes, Russ!

The output of Tony's PCB if you can test it, would be great (it's a good pcb but I have not managed to get it to work)
Compare PLL output pin4. with cell driver output at the TIP120 where the pickup is and after the resistor cap going into the PLL again Pin3.

If you can compare Tony and sharky pcb's would be useful. Why, because of the 50% duty-cycle thing. :cool:

Yes ,the resonance frequency with iron core is very low compared with the ferrite.
The settings on Sharky pcb are for higher frequency so getting resonance with the iron core you have to change the cap and R1,R2 resistors. (voltage should be very low on resonance with iron core :D)

Thanks!

Br,
Webmug

Quote from Webmug on May 19th, 2012, 01:20 AM

Quote from Faisca on May 18th, 2012, 02:29 PM

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm re-sending the diagrams of the two versions. Now, very well.

Don't know for sure, but I think the scanning is needed when the gate is active.

Russ, Sharky, do you got time to test the pcb and post some info?:D

Br,
Webmug

hello Webmug.
You are right in the pcb Meyer. Not in this topology (v2), which I presented, it is not necessary. In this, you can use the gate (pin 5, on/off), and always will be locked, only taking one cycle or less.
But in the version with scanning (v1, like the Meyer), the same test was bad and often taking longer, locking wrong.
Maybe I'm wrong, in the form of testing.
How do you testing this?
See my test provisional.

Quote from Faisca on May 19th, 2012, 08:04 AM

hello Webmug.
You are right in the pcb Meyer. Not in this topology (v2), which I presented, it is not necessary. In this, you can use the gate (pin 5, on/off), and always will be locked, only taking one cycle or less.
But in the version with scanning (v1, like the Meyer), the same test was bad and often taking longer, locking wrong.
Maybe I'm wrong, in the form of testing.
How do you testing this?
See my test provisional.

Hi Faisca,

I test it with my VIC feedback coil and circuit (AC=resonance) and a waveform generator set as pulse (bypass the opamp)

Getting resonance on the secondary coil at 16.6kHz with Sharky ("meyer") circuit.

http://open-source-energy.org/?tid=311&pid=4798#pid4798

Br,
Webmug

Quote from Webmug on May 20th, 2012, 02:10 AM

Quote from Faisca on May 19th, 2012, 08:04 AM

hello Webmug.
You are right in the pcb Meyer. Not in this topology (v2), which I presented, it is not necessary. In this, you can use the gate (pin 5, on/off), and always will be locked, only taking one cycle or less.
But in the version with scanning (v1, like the Meyer), the same test was bad and often taking longer, locking wrong.
Maybe I'm wrong, in the form of testing.
How do you testing this?
See my test provisional.

Hi Faisca,

I test it with my VIC feedback coil and circuit (AC=resonance) and a waveform generator set as pulse (bypass the opamp)

Getting resonance on the secondary coil at 16.6kHz with Sharky ("meyer") circuit.

http://open-source-energy.org/?tid=311&pid=4798#pid4798

Br,
Webmug

I'm showing a test done with PLL dphi 90 ° uC.
Notice when I change the capacitor, with what speed is locked in the new frequency.https://www.youtube.com/watch?v=etYHZbGfgIo

Good night, folks.
I made many tests with the PLL and gate pulse, but did not like it very much. I'll show some pictures.
The results more similar to our objective, we obtained shortening the gate and also scan for 55ms.
It's not perfect, and very unstable to catch, I think this diagram and pcb of S.Meyer shown, are not good, perhaps a prototype failed or changed to misinform (still can not believe that the MIB will allow this).
Anyway I think we got the idea, just have to re-shape it to work.
Tomorrow I will do the same tests (with gate) using my version uC.
See you soon.

Quote from Faisca on May 23rd, 2012, 07:47 PM

Good night, folks.
I made many tests with the PLL and gate pulse, but did not like it very much. I'll show some pictures.
The results more similar to our objective, we obtained shortening the gate and also scan for 55ms.
It's not perfect, and very unstable to catch, I think this diagram and pcb of S.Meyer shown, are not good, perhaps a prototype failed or changed to misinform (still can not believe that the MIB will allow this).
Anyway I think we got the idea, just have to re-shape it to work.
Tomorrow I will do the same tests (with gate) using my version uC.
See you soon.

Thanks for the hard work Faisca. :D

A little question guys, I almost completed my vic..but i canot find ecg918m(on the pulse indicator) op. amp.can i use lm741? i saw the pins are the same,but differents a little in the inside...Thanks in advance

Quote from Faisca on May 22nd, 2012, 07:20 PM

Quote from Webmug on May 20th, 2012, 02:10 AM

Quote from Faisca on May 19th, 2012, 08:04 AM

hello Webmug.
You are right in the pcb Meyer. Not in this topology (v2), which I presented, it is not necessary. In this, you can use the gate (pin 5, on/off), and always will be locked, only taking one cycle or less.
But in the version with scanning (v1, like the Meyer), the same test was bad and often taking longer, locking wrong.
Maybe I'm wrong, in the form of testing.
How do you testing this?
See my test provisional.

Hi Faisca,

I test it with my VIC feedback coil and circuit (AC=resonance) and a waveform generator set as pulse (bypass the opamp)

Getting resonance on the secondary coil at 16.6kHz with Sharky ("meyer") circuit.

http://open-source-energy.org/?tid=311&pid=4798#pid4798

Br,
Webmug

I'm showing a test done with PLL dphi 90 ° uC.
Notice when I change the capacitor, with what speed is locked in the new frequency.https://www.youtube.com/watch?v=etYHZbGfgIo

hi webmug.
But if you have used the generator, its vic locked with the generator. This proves nothing, only copied the PLL frequency of this generator.
Why not use the coil FB? Where the loop/link is closed?
I'll build a transformer vic (or the closest) and continue with the tests. Still, I think that for proof of my PLL resonance is sufficient to test the concept.
Success for us.

Quote from Webmug on May 19th, 2012, 03:16 AM

Quote from ~Russ/Rwg42985 on May 19th, 2012, 03:03 AM

Quote from Webmug on May 19th, 2012, 01:20 AM

Quote from Faisca on May 18th, 2012, 02:29 PM

I'm sending the diagrams of the two versions that I have succeeded.
All this I build on a breadboard, too.
"v1" Pseudo Meyer, somewhat modified.
"V2": The same, without scanning (not needed) operates automatic.
Have fun.

I'm re-sending the diagrams of the two versions. Now, very well.

Don't know for sure, but I think the scanning is needed when the gate is active.

Russ, Sharky, do you got time to test the pcb and post some info?:D

Br,
Webmug

cores will be in next week... then i can do some real tests.

at the moment, when i turn on gating it kinda skips around. it seems to act odd.

but it dose lock on at a very low frequency. this is with an iron core. so the ferrite will be a huge help...

do you need me to still test the output of tony's circuit like you asked before? and if so. what did you need me to test?

tanks! ~Russ

PS. keep up the good work and ideas guys! its grate to see everyone getting along! ;0

Yes, Russ!

The output of Tony's PCB if you can test it, would be great (it's a good pcb but I have not managed to get it to work)
Compare PLL output pin4. with cell driver output at the TIP120 where the pickup is and after the resistor cap going into the PLL again Pin3.

If you can compare Tony and sharky pcb's would be useful. Why, because of the 50% duty-cycle thing. :cool:

Yes ,the resonance frequency with iron core is very low compared with the ferrite.
The settings on Sharky pcb are for higher frequency so getting resonance with the iron core you have to change the cap and R1,R2 resistors. (voltage should be very low on resonance with iron core :D)

Thanks!

Br,
Webmug

i fail'd to do the test with tony's circuit! i had to send the circuit back to my buddy. i will have him do it, or tony, if you read this can you check it out?

thanks guys! to much going on! :) lol

~Russ

Russ,and others can you help me ?I  am confused with the transistors on the VIC card:
2n2222 to-18(metal case)=is only  NPN or is PNP too? because the B,C,E on the cell driver is different from the others,which are wich?

Quote from adys15 on May 25th, 2012, 02:04 AM

Russ,and others can you help me ?I  am confused with the transistors on the VIC card:
2n2222 to-18(metal case)=is only  NPN or is PNP too? because the B,C,E on the cell driver is different from the others,which are wich?

Hi,

The 2N2222 is an NPN type.
TO-18 is the metal can type. TO-92 is the plastic type.
The 2N2907 is an equally popular (PNP) transistor complementary to the 2N2222.

The 2N3904 is an NPN transistor that can only switch one-third the current of the 2N2222 but has otherwise similar characteristics.

Br,
Webmug

Quote

hi webmug.
 But if you have used the generator, its vic locked with the generator. This proves nothing, only copied the PLL frequency of this generator.
 Why not use the coil FB? Where the loop/link is closed?
 I'll build a transformer vic (or the closest) and continue with the tests. Still, I think that for proof of my PLL resonance is sufficient to test the concept.
 Success for us.

Hi,

I also tested this with the FB coil scanning for resonance on the secondary coil.

Br,
Webmug

Quote from Webmug on May 25th, 2012, 03:09 AM

Quote from adys15 on May 25th, 2012, 02:04 AM

Russ,and others can you help me ?I  am confused with the transistors on the VIC card:
2n2222 to-18(metal case)=is only  NPN or is PNP too? because the B,C,E on the cell driver is different from the others,which are wich?

Hi,

The 2N2222 is an NPN type.
TO-18 is the metal can type. TO-92 is the plastic type.
The 2N2907 is an equally popular (PNP) transistor complementary to the 2N2222.

The 2N3904 is an NPN transistor that can only switch one-third the current of the 2N2222 but has otherwise similar characteristics.

Br,
Webmug

Thanks Webmug,I know the 2n2222 metal case is a NPN but ,look at the att,my drawnings are corect? look at the secound 2n2222 starting from bottom of page on the cell driver that is PNP? because it has B,C,E and othets metal case 2n's has B,E,C writen on the pcb..please reply

Quote from adys15 on May 25th, 2012, 08:13 AM

Quote from Webmug on May 25th, 2012, 03:09 AM

Quote from adys15 on May 25th, 2012, 02:04 AM

Russ,and others can you help me ?I  am confused with the transistors on the VIC card:
2n2222 to-18(metal case)=is only  NPN or is PNP too? because the B,C,E on the cell driver is different from the others,which are wich?

Hi,

The 2N2222 is an NPN type.
TO-18 is the metal can type. TO-92 is the plastic type.
The 2N2907 is an equally popular (PNP) transistor complementary to the 2N2222.

The 2N3904 is an NPN transistor that can only switch one-third the current of the 2N2222 but has otherwise similar characteristics.

Br,
Webmug

Thanks Webmug,I know the 2n2222 metal case is a NPN but ,look at the att,my drawnings are corect? look at the secound 2n2222 starting from bottom of page on the cell driver that is PNP? because it has B,C,E and othets metal case 2n's has B,E,C writen on the pcb..please reply

Hi,

Yes, I see something is different with the placed 2N2222.
I think the base (middle) was bend to the other side in the pcb. looks like it is a different type but it is the same 2N2222.  22 is readable from side view. Can't find other NPN with xNxx22???

Br,
Webmug

Can you guys tell me if i done the corect conections on the VIC card I trace them with Don's spec's,please corect me, i'm confused with the baterry pozitive is on pin 3 top,and also pin 5 top/bottom...Tony would know beter because he design the skematic:D ,so Tony if you can corect it please see att

Quote from adys15 on May 26th, 2012, 10:19 AM

Can you guys tell me if i done the corect conections on the VIC card I trace them with Don's spec's,please corect me, i'm confused with the baterry pozitive is on pin 3 top,and also pin 5 top/bottom...Tony would know beter because he design the skematic:D ,so Tony if you can corect it please see att

Be careful, at your schematic the D6 D7 diode types are interchanged, compared to stans original.

Quote from pakakezu on May 27th, 2012, 11:41 AM

Quote from adys15 on May 26th, 2012, 10:19 AM

Can you guys tell me if i done the corect conections on the VIC card I trace them with Don's spec's,please corect me, i'm confused with the baterry pozitive is on pin 3 top,and also pin 5 top/bottom...Tony would know beter because he design the skematic:D ,so Tony if you can corect it please see att

Be careful, at your schematic the D6 D7 diode types are interchanged, compared to stans original.

Yea,I see maibe Don made a mistake when noted pin 6 and 7 on the cell driver patent skematic,that way is the original and that is on Tony sch.but the big problem is:what is pin 1 top.pin 2 top 3 ,4,and 1/2 bottom.I see there are 2 power lines pin 2 i think and 5 top