Notice Stan has something there too, but placed just before the TIP120. My guess this resistor was bundled in the nest of wires in the VIC cage. I haven't seen any reference to what its value should be and if I was going to hide a really important tuning variable, that's where I'd hide it.
Matt
Stan was said many times:
We are working from 0 to 10 kHz range.
I thing there is no need to go beyond 10 kHz.
My findings using this driver is that it only worked pulsing below 10khz. If you go higher 50%du is no longer maintained due transistor bias etc. Way to complex! So designing the cell and coils resonance freq. must be below 10khz. Unfortunately my setup uses higher frequency and i switched to mosfet instead.
~webmug
It seems to. At gate you can see the PLL start to hunt a little, but it comes right back in unless you aggressively gate, then the PLL looses its mind.
Starts at about 1kHz and goes up beyond 50kHz. I don't know if that is enough range or not, but this particular chip handles a much wider bandwidth than the CD4046B.
That's still a bit of an open-ended discussion as to what Stan was trying to accomplish. I left them out on this board, but may try to shoehorn them back in with a jumper selection. I personally didn't like the idea of slamming output signals together. If this signal needs to be filtered and fed back in, it should IMHO go through some sort of dedicated mixer.
so now its the 2n222... yours is an A version... ill look at mine, but i think its not the A version...
This is a pull-down resistor. The TIP120 does this internally. Thus, omitted from the card.
So the PLL function was not tested on a LC tank circuit? If the du (duty-cycle) of 50% is not there how can you lock-in?
Doesn't matter Russ. Scope through the driver circuit and you will see the 50% duty cycle is maintained all the way through until you get to the base of the TIP120--that's where you'll see duty cycle gets altered.
Yeap. And if 16kHz is high enough for the VIC & WFC, you're probably good to go.
What we do know is if different manufacturers of the TIP120 used different internal resistors. The ST version I have has 7k + 70k internal. The OnSemi uses 8k + 120k. So there is the difference in pull-down values and why Stan probably had that in his patent--because it depends on where you source your components.
It locks using mode II which is only interested in the phase angle. It doesn't care about the pulse width at all.
I can drive the PLL circuit by way of the feedback from my signal generator and it will track whatever I do, with any duty cycle I send it. So with normal feedback from the VIC, if there is any resonance there, the PLL will go straight to it. The only catch is the driver has to let through the frequency the VCO is generating.
120ohm instead of 120kohm
Doesn't matter Russ. Scope through the driver circuit and you will see the 50% duty cycle is maintained all the way through until you get to the base of the TIP120--that's where you'll see duty cycle gets altered.
50% duty cycle must be persistent throughout all frequencies. The PLL does this cleanly.
I wouldn't be so quick to state that.
oh and yes its just the tip120 that messes up the PW. agreed matt
Yeap. The smaller the resistance the higher the cutoff frequency.
right at about 15Khz was both chokes resonant, but less voltage than before.
i also had the tape in the cores still.
~Russ
Russ, it's interesting that your seeing peaks at 15kHz now...Was the only change you made reversing the L2 choke?
If Stan is telling the truth all coils should be aiding. So if you short the chokes on one end then measure the inductance you should get over 2H (depending on k factor). Mine measure around 4H.