Some goodies about the ECG918M here: http://open-source-energy.org/?topic=2283.0

:)

I got the LM393 comparator wired up this evening but it's so sensitive with open-loop gain.  Really difficult to work with on a bread-board.  The slightest little adjustment and the PLL runs off into la-la land.  I'm afraid the only way to use this device would be to have the pickup coil completely shielded with coax running back to the input of the comparator.

I tried the slope detection method and I think it can work, but you must have the right size capacitor, which I haven't been able to determine trial-n-error as yet.  It also appears a bipolar power source may be needed which I can probably do with just a pair of resistors.

More work to do I reckon.

On a positive note, the CD74HCT27, CD74HCT221 and CD74HCT7046 chips I received today all work superbly.  Gating no longer truncates the pulses and this particular PLL tracks like a dream, plus it has a direct output you can use to illuminate an LED for phase-lock status.

So at this point, I have the signal generation working really good.  Just need to figure out the feedback side and I'll have something to start designing a board around.

Quote from ~Russ on January 5th, 2017, 11:09 PM

I connected everything up with the ferite cores. and DRY cell's 6 in series.  at first i left a big gap in the core, but then decided to try to stick the closer and Snap... they popped together... and they were stuck that way. takes *some force to pull them back apart. if i drop the voltage lower they do not stick as much, but  when the voltage is around 5v or so... they hold really good. that tells me there is some DC bias ALLWAYS. also when really crainking it up around resonance they do not chatter, they just hold firm.... hummm.  i also can see this the sig never drops below 2V or so. ( the bottom of the pulse sig) this is by design.

Yep. The flat cores did that with me. I don't think DC bias has any useful explanation to make this work.

Quote from Matt Watts on January 6th, 2017, 06:53 PM

On a positive note, the CD74HCT27, CD74HCT221 and CD74HCT7046 chips I received today all work superbly.

Revised chips have improved specs and meet a quality standard (JEDEC of 747046). TI has a foot in here.

Well, never trust the schematics on semi-conductor datasheets, they could be wrong.  In the case of the LM393 comparator, it was wrong and it took a lot searching around until I identified the error.

So, my question to you all is:

Have you ever built a VIC driver that makes the core go absolutely nuts like this?

https://vimeo.com/198451646

My browser is not working correctly , but other do work. I finally got your video Matt.
thank

Quote from andy on January 7th, 2017, 05:04 AM

I cant watch your video.

Swell.  Another reason why I hate these content distribution sites.

Try this link:
http://stomp.space/vblog/20170107-VIC-Exciter.mov

Hopefully you can get to it.

Quote from andy on January 7th, 2017, 05:04 AM

I finally got your video Matt.

So what do you make of it?

That's a solid Amorphous C-core sitting on my desk, bouncing, popping and chattering like crazy.  Drive power is only about 10 volts at 250 milliamps.  Any guesses what might happen if I put another couple of coils on there and connect it to a WFC?

Are you home right now Matt? Ping me on Skype is you are setting up lab for 3 hrs. ~Russ

I have had familiar sounds coming from my Vic but only when I let the cores free. Or hold them extremely close to each other. But with a gap. ~Russ

However that could be from who knows what. And may not be the same as what your seeing.

Its as if the inductance changes and things start to go crazy. ~Russ

Only a PLL put into this particular situation is going to behave as this thing does.  I don't think it's accidental either.  I think Stan did it this way on purpose, based on his circuits.  And when you hear Dr. Greer speak about Stan not disclosing in his patents the necessary operating frequency, it's because Stan looked at the scope and noticed there is no actual operating frequency.  There's what might look like a fundamental, but beyond that any engineer would say it's just noise.  The only catch is, the "noise" is coming from the core, not the electronics.  The feedback network is telling the PLL exactly what is there and the PLL is basically saying, that can't be right, run with this frequency instead.  The cycle recurses on itself forever.

I'll try to do another video where you can see better what I see; maybe that will help make up your mind what is going on.

The circuit is not a true random noise (number) generator. For that, you'll need a source of non-deterministic entropy.

"Noise" in this case is what the PLL inputs trigger upon what is being fed back in.

This was not accidentally designed from the beginning. He knew what to do and acted accordingly. Most don't know a 4046.

Like all software and hardware development, may a bug be found in the machine someplace untriggered. Sometimes known as, a bug becomes part of the design.

Stan paid the fee for that patent. It had to work like so.

Does the feedback coil have a 10uF non-polar cap in series in this setup? (Bodged on VIC card.) That would low-pass or shrink the bandwidth down, for the PLL to see where to trigger.

Quote from haxar on January 7th, 2017, 09:48 PM

"Noise" in this case is what the PLL inputs trigger upon what is being fed back in.

Not so much "trigger upon", but phase align with.  And to accomplish this, it changes the frequency of its VCO.  But in this case, every time it changes the frequency, the feedback phase changes also.  The PLL is trying to hit a moving target and it has no way to predict where the next phase angle will be.  It only has the algorithm encoded in the silicon to work with and that's not enough to stay ten steps ahead of what the core will actually do.

I've done quite a bit with PLLs and resonant circuits; only lately have I seen others (in Russia) doing exactly what this circuit I have prototyped is doing.  And I might add, those few people in Russia are doing this on purpose with air core coils so you cannot hear what is happening like you can with a solid core.  They are doing this to create standing waves inside the coils.

Quote from haxar on January 7th, 2017, 10:00 PM

Does the feedback coil have a 10uF non-polar cap in series in this setup? (Bodged on VIC card.) That would low-pass or shrink the bandwidth down, for the PLL to see where to trigger.

I can't say, but it makes sense that it would.

If I shunt the little red 1uF Wima cap on my current setup, guess what happens?

It goes straight into resonance.  The signal it sees from the feedback very closely matches the signal that is being fed into the primary.  The PLL locks and the system is fully stable all through the voltage ranges.

4046 uses tri state bit banging (pin 2 or 13) to regulate vco frequency output depending on feedback input. it fills up and empties a capacitor C2 depending on it´s phase comparator. capacitance of that capacitor is important because it depends on that capacitance C2 and resistor R3 weather vco frequency changes quick or slow meaning respective phase alignment search is quick or slow.



and remember: 4046 exists in 2 different versions. the one stan used had 2 comparators but there is another 4046 with 3 different internal phase detect methods. be sure to use the one with 2 phase detect methods or it will not work the way stan did.

Quote from Gunther Rattay on January 8th, 2017, 02:02 AM

4046 uses tri state bit banging (pin 2 or 13) to regulate vco frequency

That may sound like it is strictly digital to many, but I'll assure you the VCO frequency is purely analog.  It can do frequencies you can't touch with a digital solution.

Quote from Gunther Rattay on January 8th, 2017, 02:02 AM

and remember: 4046 exists in 2 different versions. the one stan used had 2 comparators but there is another 4046 with 3 different internal phase detect methods. be sure to use the one with 2 phase detect methods or it will not work the way stan did.

I'm using the CD74HCT7046A.  This version has an order of magnitude larger bandwidth and a direct phase-lock indicator output.  It is pin compatible with the CD4046B as used in Stan's circuit.  There are a couple of subtle differences in the component values you must select due to the 5 volt TTL compatible power requirements.

A good read is the attached document.

Quote

One should always be aware that textbook approaches often are developed for applications not identified or with limitations and assumptions not given.

Quote from Matt Watts on January 8th, 2017, 04:40 AM

That may sound like it is strictly digital to many, but I'll assure you the VCO frequency is purely analog.

True, purely analog using tri state to get up, down and hold state for C2 charge.

Matt
You wrote:
If I shunt the little red 1uF Wima cap on my current setup, guess what happens?

Where was connected this 1 uF Wima cap in your setup?

Starting at page 13 @ TI pdf: The lock Schmitt trigger appears to be consolidated into the 7046. On the VIC card after 4046 pins 1 & 2, go right to a dual 4001 Schmitt trigger.

It uses input pins 14 & 3 for the internal lock detector.

For 7046 pin 15, the cap would be 0.01uF, 10nF, from VIC trace.

This PDF is helpful.

Quote from andy on January 8th, 2017, 12:39 PM

Where was connected this 1 uF Wima cap in your setup?

The feedback circuit is terminated with a high frequency current sense transformer and the feedback coil on the main core loops through this current sense transformer in-series with the 1uF cap.  The motivation for doing it this way is to eliminate as much electrostatic disturbance from the LM393 zero-cross detector as possible.  If the pickup coil is connected directly to the LM393, it is way too sensitive and just passing your hand near it throws it all out of whack.

It's the same idea why we use 4 to 20 mA current loops instead of high impedance voltage signals for instrumentation.  Current is stable, voltage is not.

Quote from haxar on January 8th, 2017, 02:42 PM

For 7046 pin 15, the cap would be 0.01uF, 10nF, from VIC trace.

It's really not all that critical for the LED.  The capacitor you select mostly just determines how much flicker in the LED you want to tolerate when on or near lock.

Quote from haxar on January 8th, 2017, 02:42 PM

This PDF is helpful.

Yes it is.  If you want to plow through all the math, you can design a PLL circuit to do pretty much anything you want, but it's still good to do some trial-n-error experimenting to really get a feel for this chip and its behavior.  Spend enough time doing that and you will probably find things you actually want but didn't know you could do.

Thank you for answer Matt

A little progress today, ten plus hours worth.  Take a peak and post any obvious errors if you spot them.  Attached is the whole DipTrace project for this board with my custom libraries, datasheets and PDF printouts.

I know it will take me at least three days staring at everything before I dare try to send them out to fabrication.  One little hole in the wrong place or a shunted trace where it shouldn't be and that's $150 down the toilet.

ok, you changed your attachmens to a zip file. now i know why access error was displayed.