ok, that's what i thought, thanks!
Russ,Webmug, are you using what we have in the schematics posted? if not could you please post the schematic your using. i know your pulsing it from 1-99% so i believe your using the circuit in the patents.It looks like the "voltage amplitude control" circuit is working as Stan described it in the tech brief.
"Variable voltage range (32a xxx 32n) from one(1) up to twelve (12) volts"
Voltage can be adjusted with external pulse frequency duty cycle control. 1% to 99% translated to analog voltage amplitude 1V to 12V.
Minimal voltage offset and gain adjustable going into the cell driver circuit that drives the VIC primary coil.
I have (re)build the circuit from the patent WO 92/07861 Fig 4 "Voltage amplitude control"
I pulse the input "J analog voltage" with 0 to + 5V on a fix pulse frequency.
Then duty cycle is adjusted 1% to 99% with my pulser on that pulse frequency to regulate the voltage amplitude going to TX1 (primary input)
also, are you building all the PLL circuitry also?