Hi Guys. I have some unclear thing about the resonance finder circuit.
A phase lock loop circuit will set the feedback for the VCO(voltage controlled oscillator) to find the frequency where the two signals are in phase. When the phase shifts the frequency is adjusted again to get back the in phase condition. This needs some time.
But, Meyer did gated the output signal, this means, when the output signal is turned off by gating, the feedback signal disappears, automatically is caused an unlock condition, and the frequency is shifting away. But when the gating is on again, the system tries to lock in again.
So if the gating frequency is too high, we never get lock`d in. But, from the drawings we have only few impulses to lock in again. Or is something I missed, and while gating is off, the PLL don`t changes the VCO?
Other thing I want to warn you, is the Core saturation. When the core is saturated(magnetized whit to high current), the inductance is dropping down whit division to 1000`s of times. So if we have an LC resonance circuit this is ruining everything. I`m sure because of this was a built in power supply in each vic card.