This is the new topic I will be posting on, continuing my research in a new direction.

The attached circuit, is a mirrored version of what I have been researching. Thus, positive impulses, and a negative DC offset of the primary coil.

The L4 extra coil is grounded (DC positive supply is also grounded)

A MOSFETs are in series for high voltage positive voltage impulse generation.
If the impulse voltage stays below 1700V a single MOSFET is enough (with a 1200V SiC MOSFET)

B MOSFETS are in parallel for high current -DC offset discharge. Rds MUST be low, I will  start with 21 milli Ohm,

B should be triggered on a sub octave of A MOSFETs (A MOSFETs are 50% duty, while B MOSFETs can be 10% duty or less)
B MOSFETS should be actively cooled. as the C2 is discharged through them giving very high current.
This current impulse, gives an unidirectional displacement current into the circuit.

* as an alternative, I can discharge C2 to C4, and re use the energy

edit
after research and learning,
I added my new design which discharges a cap between ground and L4 outside rim, which has a negative dc offset. The pulse of sw2 isn't delayed, but discharged after only a half period. sw1 and sw2 can be driven like a half bridge circuit.

I build up the basic circuit, without DC offset, and without the B mosfets, and tested it with a crude tuning at 114.9kc/s
It all works fine. nice impulse.

I only reversed the input diode, and reversed the labels on the input board. And added a connector on the source, so I can easily connect the DC off set module.
The DC offset module still has the diodes in reverse, so I will need to fix them first.
Maybe I will make a new module for the negative DC offset, as I have taped and epoxied the high voltage parts.
Also considering how much DC offset I can use, with the mosfets.

Still need a delay module for the B mosfets. The Idea is to let the A mosfets cycle 10 times, and then trigger the B mosfets shortly for the DC discharge. The lower B mosfet frequency, not only gives time for the DC offset to charge by the positive impulses, but also to keep the B mosfets cool enough.

The L2 coil will act as a kind of choke, for the discharge. so that the Large C6 1uF cap at the source wont (fully) discharge through the mosfet. But L2 is series resonant, so would have low impedance, leaving only the wire resistance of L2. So... more turns if needed, to keep the wire resistance up. Although that same resistance would influence the Q of L1 impulse, and lower it in voltage, prolonging it in duration.... but that is for future testing.

For now this setup works.
one step at the time...

B mosfet must be slave of A mosfet.

CD74HC4017EE4 (mouser) dip16 ordered here:
https://nl.mouser.com/ProductDetail/Texas-Instruments/CD74HC4017EE4?qs=xFfolx0DHx2OmcXpo3R48Q%3D%3D
these ICs can count to 10 but can be connected in parallel for higher numbers.

74ls90 might be another option, but seems weird in its logic

the output must be fed into another IC to adjust the duty cycle, I still have a bunch of HEF4528 which can do that trick: https://assets.nexperia.com/documents/data-sheet/HEF4528B.pdf
Dual monostable multivibrator

a simple 8dip switch could be used to select how clock cycles delay is needed

all this will cause some extra delay, but these chips are fast, and delay will be good as the B discharges then will better line up with the impulse, which can result in the ability to use higher dc offset, since the positive impulse will already have decreased the - dc offset a bit

Today I made a negative DC offset Module. After correcting a diode it now works.
it also immediately made a problem clear, which might be a solution!
attached scope shot shows it.
ignore the orange.
in yellow (DC coupled probe) shows the positive impulse, and the negative  DC offset.
impulse = + 1500V
while DC offset is -1300V dc

problem, or solution! is that the impulse completely (even more) discharges the DC offset.

What I had planned, is to short the DC to ground, and then slowly bring it back up by letting the impulses charge the DC back up.
And I wanted to do it at the time of the impulse.
So a sharp discahrge like the impulse first half (quarter wave).
keep it zero, then slowly charge back up.

resulting in a single direction displacement current.

So, now I'm still thinking I could use the impulse, to discahrge. And then use the parallel mosfets, to keep the voltage of L2 at zero volt. for, lets say until the next impulse triggers again.

now... what happens then?
impulse voltage is MAX positive. So this L1 coil dielectric energy is MAX.
Then the L2/C2 tuning cap junction is switched to ground by the B MOSFET.
Thus, L1 dielectric field will fully discharge. thus the second quarter period (second half of the impulse) is cancelled.
Beautiful, so far so good.

But now comes the deal with the DC offset. C2 and C6 at both ends of L2 are charged with negative voltage.

Lets first deal with C2.
C2 is lets say 45nF. and charged to lets say -2kV
it now has the B mosfet connecting it to ground.
B mosfet switched on when the impulse was max
L1 has discharged.
But C2 charge? how ever it will play out, it will be discharged through B mosfet to ground.
So... C2 is empty. zero volts.

Now C6 comes into play.
C6 has L2 between itself and the B mosfet to ground.
So C6 discharge will be somewhat delayed, due to the L2 resistance (assuming impedance is "zero" due to series resonance)
C6 has a MUCH bigger charge (tension) then C2.
C6 will want to be discharged through L2 through the B MOSFET.
but we first need to look at L2

L2 will have a massive voltage difference over it, due to C2 being zero, while C6= charged to -2kV
That happens every time, when the impulse occurs, so nothing extra special.

So back to C6. I would like to think that the L2 resistance will limit the discharge current of C6.
from here on there are 2 scenarios.
1 is we let C6 discharge (heating up the B mosfets)
2 we turn the B mosfet off. and don't discharge C6 (maybe only partly)

1 is simple. B mosfets burn up, get hot from the massive charge dump of C6.
L2 will be provided by max current, limited by voltage of c6 and L2 resistance.
giving a discharge curve, that slowly slows down.

Meanwhile B mosfet stays grounded, C2 stays grounded...
This is just wasting energy away.

So scenario 2.
B MOSFET has discharged L1 capacity, and C2 capacity, after this short discharge period (however long it takes I dont know)
We turn off B mosfets.
Then, C6 is still charged, and will charge C2 back up with negative voltage.
this charging up of c2 is slowed down, by the L2 resistance.
A slow charge curve is present, until C2 is charged again.
Hej!
Thats what we need! fast discahrge, slow charge. perfect.

Now the C6 tension detirmines the charge time, and we can change that by changing the capacity of C6.
bigger C6 capacity, is bigger tension, more current, faster charge.
smaller C6 capacity, is smaller tension (for smaller voltage) less charge current, slower charge.

If matched properly, we could even do a discharge like this, every impulse.
But I do not think that L4 will like that.

L4 needs the impulses to get swinging. So I would prefer a current impulse once every. 10? voltage impulse?

This also means, since C6 will barely discharge, I dont need to analyse the charge time of C6.

but... the B MOSFET should be delayed, until the C6 and C2 caps are fully charged.

and... lets not forget, after C6 has charged c2 up, it will need to be recharged by some impulses again

ok. nice!
Very curious how this will work out.

for current sharing parallel mosfets
Vgs threshold is important

I should measure and match the parallel mosfets so they will turn on at the same time.
else one conducts earlier and get the full load.

I need to. measure L2 wire resistance, as it is important for the charge process of C2 after the B mosfets have turned off again.

If needed, larger resistance could be needed, using thinner wire with more windings.
this will also influence the impulse speed.

I found 2 MOSFETS that are matched in Vgs threshold. both at 2.6V
Capacity is also close. 7.06nF and 7.09nF
this will ensure they will switch on at the same time.

smd soldered the gate driver ICs (ordered new ones from mouser, now they are sold out again).

and the 2 isolated dc to dc converters of my last 4 that I have (not yet in stock)

very curious how they will work in parallel.

I could have choosen for a single isolated driver for both mosfets, but... then I would run into cooling problems and gate ring trouble.

this is to critical so, I choose for dedicated drivers 1 per mosfet

there is another option.

But this needs a much slower impulse, and therefore it needs much more power to gain high voltage impulse.

the idea, is to use a MOV diode parallel to L1. (or a mosfet).
L1 is allowed to create current from the series mosfet switch.

when power is turned of, L1 becomes resonant and produces the high voltage negative impulse. with a relative slow duration.

once the voltage threshold is reached the MOV will start conducting, and short L1 out, collapsing the voltage near instantly to zero.

MOV has to disipate all the heat, and cant be properly cooled, so it will need a proper heating body, ar3 ther 247 body MoV DIODES?

Same can be done with parallel diodes. Mosfet turns on at Vmax of impulse, oh no... this will create a problem due to the body diode polarity, which needs to block positive, and then block negative. impossible?

well maybe not if L1 is not discharged to ground but another positive capacitor?

Which brings us to the original design.
Am I going to discharge C2 to ground and waste the energy away as heat?

or... could I capture the energy in a already positive charged capacitor like C4?

hell yes! negative side of C4 (bottom) can be charged up ab bit, as long as the diode at V- can deal with the voltage. then C4 energy is used again in the next cycle.

Really cool how you can keep recycling electric energy! although the mosfet switch would definitely loose energy through heat.

No gain.
gain comes from the displacement from L2 pulling energy out of the ground via L4. using L3 as a capacitor plate.

This will only work with one polarity. well see wich one. I place my bets on negative dc to positive discharge on the l2 primary plate coil

L2 suddenly becomes more positive, so L3 will want to become more positive.
hey wait. thats wrong, it will push out the negative.

L2 should become more negative, L3 will mirror L3 as capacitor plate, and want to become negative, so it draws in negative from the amient.

Or... more positive attracts more negative?
more tension?

So this I can't work out in my limited brain, so I just will need to test.

probably first do it wrong, then do it right.
Lol will be fun videos.

 Evo Looks like your getting back to super fast switches like matts circuit

please review

Quote from securesupplies on January 17th, 2023, 05:15 AM

Evo Looks like your getting back to super fast switches like matts circuit

please review

Yes I am!

I have 1200V 21m Ohm  mosfets.
but I also have 4 1700V 80m Ohm mosfets, BUT they are C2M, so they still will work with the 15V gate voltage, but would prefer 20V.
Since higher voltage is much more interesting, I will match 2 1700V C2M SiC mosfets for their Vgs threshold. and solder them in place.

I could also go crazy, and use 2x series 2x parallel, but... that will only happen I have seen the effect of L4 cumulative ringing.
40mOhm is still good.

with the 1200V I get 11mOhms.... BUT with a lower voltage...

I finished the 2 PCB's for parallel gate driving...
Parts for the counter are underway

https://assets.wolfspeed.com/uploads/2020/12/C2M0080170P.pdf

I see they have a replacement with only 45mOhms:
https://assets.wolfspeed.com/uploads/2020/12/C2M0045170D.pdf

very happy to know, I can drive my C2M mosfets with the 15V gate drivers of my C3M PCB's

silicon carbide is particulary interesting technology well done Evo

can wait give this circuit a try do post gerber i will try it can try compare matts side by side

https://assets.wolfspeed.com/uploads/2020/12/C2M0080170P.pdf

The P addition, says it has TO-247-4 Plus which has the wrong pinout for my PCB
Drain source (2x) Gate,

instead of Gate Drain source (PCB)

if I reverse it, it will be gate source drain. So gate in the right place,
but source and drain still need to be reversed....

Or keep it straight, put the drain and source in their place, and only redirect the Gate...
Increasing gate ringing, but I have more headroom there.
I don't like the idea of screwing up the gate pin, as these are extremely expensive, and unavailable...

Better test with the 1200V mosfets first.

in the end I can always go crazy and do series parallel with the 1200V SiC. then I get 21m ohm 3500V (MAX) capabilities. as those 1200V SiC tested to work up to 1750V

Quote from securesupplies on January 17th, 2023, 06:41 AM

can wait give this circuit a try do post gerber i will try it can try compare matts side by side

sadly parts are still out of stock.

Obvious point here  but need to mention for others out  there reading , warning can be large back spike kick from back emf  in this circuit protect for it expect it and if you know the circuit well enough extract it to fast fill graphene caps and than cascade  into  slow fill cap banks to be conditioned regulated for use. 

Resistance in parts must be account for and the capacitence in those coils is very high on and between wire and insulation.
the radiant emf is high if capcetence nt bled of and it can even radiant charge a number of surrounding coils wirelessly

make some lead / alluminium sheild for the emf coming off so not to cook human cells if sitting long periods

What evo is doing is advance high power radiant energy

Fun indeed

Finished building the pcb used for parallel switching

I used the C3M0021120D mosfets
1200V 21mOhm matched 2.6Vgs threshold.
capacity 7.09nF and 7.06nF

total 400A peak current with 1700V capability (tested)

now, I have to wait for the parts of the delay circuit. Or I could use my dual square wave... hmm

first a break

Quote from securesupplies on January 17th, 2023, 07:27 AM

Obviouc but need to mention for other there can be large back spike kick in this circuit protect for it expect it and if you know the circuit well enough extract it to fast fill graphene caps and than cascade  into  slow fill cap banks to be conditioned regulated for use. 

Fun indeed

yes that large back spike kick (voltage impulse) is what it is all about in my research.

I use it to get my L4 extra coil ringing.
and to charge up a DC capacitor.
this DC is used to create a dc offset in my primary (L2)

which is then suddenly quickly discharged by these B mosfets (creating a current impulse)
after which it is relativly slowly charged up again

Happy New Year Also 2023 Evo

Quote from securesupplies on January 17th, 2023, 11:07 AM

Happy New Year Also 2023 Evo

Happy new year to you too.
almost Chinese new year of the rabbit this Saturday with the new moon

Hi Evo, I am no expert in this area (more of a tinkerer, so to speak) but, have you tested any IGBT's for this? I have been using this device recently for some time now as they are very much designed for induction devices and are pretty quick and capable.
1200V 30A/60A continuous depending on variant and are pretty fast. I'm not sure how they compare to your MOSFETs (maybe not suitable) but I like the ease of driving them with logic level. https://www.rapidonline.com/igbts

Thoughts?

Quote from Evengravy on January 18th, 2023, 04:05 AM

Hi Evo, I am no expert in this area (more of a tinkerer, so to speak) but, have you tested any IGBT's for this? I have been using this device recently for some time now as they are very much designed for induction devices and are pretty quick and capable.
1200V 30A/60A continuous depending on variant and are pretty fast. I'm not sure how they compare to your MOSFETs (maybe not suitable) but I like the ease of driving them with logic level. https://www.rapidonline.com/igbts

Thoughts?

Yes the B Mosfets can be replaced by IGBT's
definitely an option.
depends on their capacity and on resistance, and voltage and pulse current capabilities

inputs to ground or positive when not used.
5v supply can be used, 500mW power, 100mA
per output pin is 100mW (20mA)

If pin 14 is set high,
then clock on 13, will advance the count. (negative transition)

pin 12 (carry out)  is used to connect to the clock of the next IC (13 or 14) if more then 10 steps are needed.
"When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5,
6, 7, 8, and 9, can be used to drive the CP0 input of the next counter"
I dont fully understand how that works yet

pin 8=gnd pin 16 is V+

1 to 7 and 9 to 11 are outputs:
3=0
2=1
4=2
7=3
10=4
1=5
5=6
6=7
9=8
11=9

pin 15= reset (connect to pin 10 if 5 steps are needed?) if high, then reset count to 0
So, the right output, should be connected to pin 15 for the right amount of delay.

https://assets.nexperia.com/documents/data-sheet/HEF4017B.pdf

4017 chips have arrived.
I see I can make a nightrider led chaser with these.
But my favorite would be the cylon eyes from battlestar gallactica.
would be good fun

Instead of discharging C2 through the B MOSFETs to ground,
I can discharge into C4 negative plate, and again re use the energy in the next cycle.

 When cascading 4017 counters,
 the  Q5-9 output,
which is LOW while the counter is in states 5, 6, 7, 8 and 9,
can be used to drive the CP0 input of the next counter

says the datasheet
https://assets.nexperia.com/documents/data-sheet/74HC_HCT4017.pdf

with on page 14 the attached image.

It makes NO sense to me.

ah ok, I need a AND gate, I ordered some CD4081

this video explains

https://youtu.be/xig0oOhMcz0