This thread is the place for discussions about modules for Stan Meyer´s technology posted in my other thread  "VIC components modular design library" at http://open-source-energy.org/?tid=469&pid=4630#pid4630.

Hi bussi04,

Quote

"some modules successfully used for proper VIC operation."

Are there any modules successfully used? :huh:

Br,
Webmug

Quote from Webmug on April 27th, 2012, 02:09 PM

Hi bussi04,

Quote

"some modules successfully used for proper VIC operation."

Are there any modules successfully used? :huh:

Br,
Webmug

Yes, I post those circuits operating well in my lab environment.

http://open-source-energy.org/?tid=469&pid=6965#pid6965

With my RLC meter I can do good measurements and is stable.

But the WFC is frequency depended and it also depends what kind of water you are using. So this is why Stan used a PLL system tuning in on the dynamics of water.

Did you test your circuit on the 3 incher?

Br,
Webmug

Quote from Webmug on August 13th, 2012, 05:49 AM

http://open-source-energy.org/?tid=469&pid=6965#pid6965

With my RLC meter I can do good measurements and is stable.

But the WFC is frequency depended and it also depends what kind of water you are using. So this is why Stan used a PLL system tuning in on the dynamics of water.

Did you test your circuit on the 3 incher?

Br,
Webmug

No, I used it with a 12 inch tube a year ago.

Today, 04:26 AM Post: #4 |
geenee  
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RE: VIC components modular design library
great work,Bussi04

thanks
geenee
Hi bussi04,

Looks great!!!! I like your scope too  I have the same.

Interesting Propeller P8X32A uC, 8 controllers with own PLL (cogs) in SoC!!!

Question:
Can you use a phase lock loop clock (cogs) in sync from a input pin? Used for VIC feedback operation? I assume your using two cogs for PULSE and GATE frequencies?
Also the up and down frequency scanner is a good feature!

Regards,
Webmug
That's awesome Bussi04, glad to see you post up videos as well.
(Today 07:05 AM)Jeff Nading Wrote:  
That's awesome Bussi04, glad to see you post up videos as well.

Thanks for all your positive comments. Jeff can you please move those comments after my last post above to the other thread I have set up for responds?

Thx in advance :-)

Quote from Jeff Nading on November 20th, 2012, 10:12 AM

Hi bussi04,

Looks great!!!! I like your scope too  I have the same.

Interesting Propeller P8X32A uC, 8 controllers with own PLL (cogs) in SoC!!!

Question:
Can you use a phase lock loop clock (cogs) in sync from a input pin? Used for VIC feedback operation? I assume your using two cogs for PULSE and GATE frequencies?
Also the up and down frequency scanner is a good feature!

Regards,
Webmug

Webmug,

sorry for the long delay ...

the propeller uses a single cog per channel for gating and pulsing. there is a single opamp circuit needed to get PLL feedback from up to 3 transformers.

The pulse generator is a single chip solution.

http://open-source-energy.org/?tid=469&pid=9806#pid9806

per channel there are 3 outputs: 1 for pulsing, 1 for pulsing at resonant condition, 1 for eec.

Update 09-22-2014: actual input/output configuration has been changed/optimized ;)

This circuit is the easiest way I have found worldwide to get access to a Stan Meyer type pulse generator. Using the windows client you only need that propeller chip and a driver stage.
The most simple one is a single Darlington or a single MosFet. Throw away that SCR ...
And there you go for an 8XA!

That way the pulse generator can be seen as a software project. If you buy a propeller-stick off the shelf you only have to download some software and run.

plug & play.

If you like to use the LCD interface you only need the LCD, 2 rotary encoders and a resistor array.

KISS - keep it simple stupid :-)

Enjoy!

Quote from bussi04 on December 15th, 2012, 05:39 AM

Quote from Jeff Nading on November 20th, 2012, 10:12 AM

Hi bussi04,

Looks great!!!! I like your scope too  I have the same.

Interesting Propeller P8X32A uC, 8 controllers with own PLL (cogs) in SoC!!!

Question:
Can you use a phase lock loop clock (cogs) in sync from a input pin? Used for VIC feedback operation? I assume your using two cogs for PULSE and GATE frequencies?
Also the up and down frequency scanner is a good feature!

Regards,
Webmug

Webmug,

sorry for the long delay ...

the propeller uses a single cog per channel for gating and pulsing. there is a single opamp circuit needed to get PLL feedback from up to 3 transformers.

The pulse generator is a single chip solution.

http://open-source-energy.org/?tid=469&pid=9806#pid9806

per channel there are 3 outputs: 1 for pulsing, 1 for pulsing at resonant condition, 1 for eec.

This circuit is the easiest way I have found worldwide to get access to a Stan Meyer type pulse generator. Using the windows client you only need that propeller chip and a driver stage.
The most simple one is a single Darlington or a single MosFet. Throw away that SCR ...
And there you go for an 8XA!

That way the pulse generator can be seen as a software project. If you buy a propeller-stick off the shelf you only have to download some software and run.

plug & play.

If you like to use the LCD interface you only need the LCD, 2 rotary encoders and a resistor array.

KISS - keep it simple stupid :-)

Enjoy!

very good, Bussi.
But as it would be in automatic mode?
Because of that, it would catch on that freq.?
What is the logic (algorithm) that you used for the condition "lock"?
I ask all this because I implemented one, where the algorithm is based on crash in Dephi 90 °, assuming a topology "LC" at the point of feedback.

Quote from Faisca on December 27th, 2012, 12:45 PM

Quote from bussi04 on December 15th, 2012, 05:39 AM

Quote from Jeff Nading on November 20th, 2012, 10:12 AM

Hi bussi04,

Looks great!!!! I like your scope too  I have the same.

Interesting Propeller P8X32A uC, 8 controllers with own PLL (cogs) in SoC!!!

Question:
Can you use a phase lock loop clock (cogs) in sync from a input pin? Used for VIC feedback operation? I assume your using two cogs for PULSE and GATE frequencies?
Also the up and down frequency scanner is a good feature!

Regards,
Webmug

Webmug,

sorry for the long delay ...

the propeller uses a single cog per channel for gating and pulsing. there is a single opamp circuit needed to get PLL feedback from up to 3 transformers.

The pulse generator is a single chip solution.

http://open-source-energy.org/?tid=469&pid=9806#pid9806

per channel there are 3 outputs: 1 for pulsing, 1 for pulsing at resonant condition, 1 for eec.

This circuit is the easiest way I have found worldwide to get access to a Stan Meyer type pulse generator. Using the windows client you only need that propeller chip and a driver stage.
The most simple one is a single Darlington or a single MosFet. Throw away that SCR ...
And there you go for an 8XA!

That way the pulse generator can be seen as a software project. If you buy a propeller-stick off the shelf you only have to download some software and run.

plug & play.

If you like to use the LCD interface you only need the LCD, 2 rotary encoders and a resistor array.

KISS - keep it simple stupid :-)

Enjoy!

very good, Bussi.
But as it would be in automatic mode?
Because of that, it would catch on that freq.?
What is the logic (algorithm) that you used for the condition "lock"?
I ask all this because I implemented one, where the algorithm is based on crash in Dephi 90 °, assuming a topology "LC" at the point of feedback.

the phase shift is calculated internally. at the moment phase shift detected is 0 ° but can be easily changed to 90 ° or any other degree wanted.


Update 09-22-2014: phase shift variable between 10 and 170°, if you swap the feedback input resulting in a range of 10 ... 359°.

Quote from bussi04 on January 18th, 2013, 04:27 AM

Quote from Faisca on December 27th, 2012, 12:45 PM

Quote from bussi04 on December 15th, 2012, 05:39 AM

Quote from Jeff Nading on November 20th, 2012, 10:12 AM

Hi bussi04,

Looks great!!!! I like your scope too  I have the same.

Interesting Propeller P8X32A uC, 8 controllers with own PLL (cogs) in SoC!!!

Question:
Can you use a phase lock loop clock (cogs) in sync from a input pin? Used for VIC feedback operation? I assume your using two cogs for PULSE and GATE frequencies?
Also the up and down frequency scanner is a good feature!

Regards,
Webmug

Webmug,

sorry for the long delay ...

the propeller uses a single cog per channel for gating and pulsing. there is a single opamp circuit needed to get PLL feedback from up to 3 transformers.

The pulse generator is a single chip solution.

http://open-source-energy.org/?tid=469&pid=9806#pid9806

per channel there are 3 outputs: 1 for pulsing, 1 for pulsing at resonant condition, 1 for eec.

This circuit is the easiest way I have found worldwide to get access to a Stan Meyer type pulse generator. Using the windows client you only need that propeller chip and a driver stage.
The most simple one is a single Darlington or a single MosFet. Throw away that SCR ...
And there you go for an 8XA!

That way the pulse generator can be seen as a software project. If you buy a propeller-stick off the shelf you only have to download some software and run.

plug & play.

If you like to use the LCD interface you only need the LCD, 2 rotary encoders and a resistor array.

KISS - keep it simple stupid :-)

Enjoy!

very good, Bussi.
But as it would be in automatic mode?
Because of that, it would catch on that freq.?
What is the logic (algorithm) that you used for the condition "lock"?
I ask all this because I implemented one, where the algorithm is based on crash in Dephi 90 °, assuming a topology "LC" at the point of feedback.

the phase shift is calculated internally. at the moment phase shift detected is 0 ° but can be easily changed to 90 ° or any other degree wanted.

if it is not the will, to explain the logic of the algorithm, then do a show where we can see it done.
Because I do not see how the PLL would lock in resonance with 0 ° phase shift. The same is observed in the circuit Meyer.
Brazil.

Quote from Faisca on January 18th, 2013, 06:01 AM

if it is not the will, to explain the logic of the algorithm, then do a show where we can see it done.
Because I do not see how the PLL would lock in resonance with 0 ° phase shift. The same is observed in the circuit Meyer.
Brazil.

It´s easily explained:

the first pulse is decreased from highest frequency down. whenever pulse goes high a counter starts counting the ns until the feedback input from the coil thru an opamp goes high. that way you get the actual phase difference in ns.

assuming duty cycle of 50% the on-time lasts for a known number of ns. the phase difference (ns) counted divided by actual on-time in ns gives the phase shift in %.

by decreasing or increasing the first pulse frequency you vary the feedback input signal until it meets the phase shift angle within a customizable window you want.


the reason why the Meyer circuit does not lock in is that we are assuming, that the phase shift is an indicator for lock in.

looking at scope shots from vics and wfcs there seem to be many different sweet spots showing some kind of patterns.

as I assume there is another condition than 90° phase shift showing the resonance case we are looking for.

Observing scope display gives initial information about optimum conditions. once they are found the electrical indicator must be defined and THEN a circuit can work in automatic mode.

we can´t be sure that the circuit Meyer published is the one working fine. Maybe a more sophisticated circuit has never been published or found.

Quote from bussi04 on January 18th, 2013, 06:49 AM

Quote from Faisca on January 18th, 2013, 06:01 AM

if it is not the will, to explain the logic of the algorithm, then do a show where we can see it done.
Because I do not see how the PLL would lock in resonance with 0 ° phase shift. The same is observed in the circuit Meyer.
Brazil.

It´s easily explained:

the first pulse is decreased from highest frequency down. whenever pulse goes high a counter starts counting the ns until the feedback input from the coil thru an opamp goes high. that way you get the actual phase difference in ns.

assuming duty cycle of 50% the on-time lasts for a known number of ns. the phase difference (ns) counted divided by actual on-time in ns gives the phase shift in %.

by decreasing or increasing the first pulse frequency you vary the feedback input signal until it meets the phase shift angle within a customizable window you want.


the reason why the Meyer circuit does not lock in is that we are assuming, that the phase shift is an indicator for lock in.

looking at scope shots from vics and wfcs there seem to be many different sweet spots showing some kind of patterns.

as I assume there is another condition than 90° phase shift showing the resonance case we are looking for.

Observing scope display gives initial information about optimum conditions. once they are found the electrical indicator must be defined and THEN a circuit can work in automatic mode.

we can´t be sure that the circuit Meyer published is the one working fine. Maybe a more sophisticated circuit has never been published or found.

busi04 agree with you and realize that your program exceeds mine, just the possibility of modeling the expected lag of feedback.
I made based on my 90, because that was the pattern identified in my experiments, but I realize that would be finer tuning, also were detected peak voltage of the cell.
Thank you.

Bussi,

Heatlocke is looking for a solution to test his Bob Boyce apparatus and mentioned to me he would like to have three output signals all running at the same frequency and duty cycle but be able to slightly alter the phase angle between these three signals.  It appears from your latest advanced features update PGen 2.0 can do this.  At what units of precision is it able to accomplish this?

If you wouldn't mind, touch base with Heatlocke and see if you can lend him some assistance.  I think you have a superior solution here that may work well for him.

Thanks,

D1

Quote from Dog-One on May 24th, 2013, 07:50 AM

Bussi,

Heatlocke is looking for a solution to test his Bob Boyce apparatus and mentioned to me he would like to have three output signals all running at the same frequency and duty cycle but be able to slightly alter the phase angle between these three signals.  It appears from your latest advanced features update PGen 2.0 can do this.  At what units of precision is it able to accomplish this?

If you wouldn't mind, touch base with Heatlocke and see if you can lend him some assistance.  I think you have a superior solution here that may work well for him.

Thanks,

D1

D1,

thanks for your information. I will follow your link and make contact to Heatlocke.



timebase resolution is 12.5 ns (1 tic). that means that any shift between 0 and 360° can be done in 12.5 ns steps.
windows interface supports shift parameter in tics or degree (min. 2 decimal places resolution).

minimum pulse on time is 1 us and minimum pulse off time is 5 us.

maximum number of pulse segments building a pulsetrain is 8.

Quote from securesupplies on May 24th, 2013, 10:53 AM

Hi

WOW, Think this thread has not been seen yet well done my friend

To promote this can you do a step by step screen shot of circuit map setup and or
 how to connect and post I will help thread get exposure

Very cool to see micro controllers advancing on Stans Work !!
Great  did you post the  scripting file yet?

Dan
www.securesupplies.biz
sourcing & distributing vital items

Dan,

I´ll post some more information about these features soon.


for in detail technical information or your featurelist please make direct contact to Innovationsshop. there are several manuals giving deep insights into technical details to PGen product family.

Quote from bussi04 on May 24th, 2013, 11:18 AM

Quote from securesupplies on May 24th, 2013, 10:53 AM

Hi

WOW, Think this thread has not been seen yet well done my friend

To promote this can you do a step by step screen shot of circuit map setup and or
 how to connect and post I will help thread get exposure

Very cool to see micro controllers advancing on Stans Work !!
Great  did you post the  scripting file yet?

Dan
www.securesupplies.biz
sourcing & distributing vital items

Dan,

I´ll post some more information about these features soon.


for in detail technical information or your featurelist please make direct contact to Innovationsshop. there are several manuals giving deep insights into technical details to PGen product family.

Cool Thank you,

I would like to consolidate and distribute this info more
from Innovationsshop do you have files or links directly to info
or in word pdfs,  we should get a step by step with parts to use done this section can advance tech alot.

I will post here and other locations for you well DOne!!

Add me to skype daniel.donatelli

let keep co operating, skpye

adds more direct speed as team ,skype is daily website 2-7 days
with clipping and distributing info.

dan

Quote from Faisca

Quote from Faisca on December, 2012
But as it would be in automatic mode?
Because of that, it would catch on that freq.?
What is the logic (algorithm) that you used for the condition "lock"?
I ask all this because I implemented one, where the algorithm is based on crash in Dephi 90 °, assuming a topology "LC" at the point of feedback.

Quote from Faisca on January, 2013
if it is not the will, to explain the logic of the algorithm, then do a show where we can see it done.
Because I do not see how the PLL would lock in resonance with 0 ° phase shift. The same is observed in the circuit Meyer.
Brazil.

... some times it takes a bit ...
but here you are ...

https://www.youtube.com/watch?v=BdgJMh9hTQw#ws
(for a full screen display click on YouTube bottom right hand corner)

the phase shift is a configuration parameter in an ini-file and can be adjusted on demand. the vid shows it working at 90°.